#include "link32fa016bx.h"
PLIC_Handler_Type PlicHandlers[PLIC_INTNUM];

/**
 * \brief  Exception Entry
 * \details
 * This function provide common entry functions for exception.
 * \remarks
 * This function provide a default exception entry.
 * ABI defined caller save register and some CSR registers
 * to be saved before enter interrupt handler and be restored before return.
 */
void TrapEntry_xcpt(void)
{
	#ifndef __riscv_32e
	asm("addi sp, sp, -80");
	#else
	asm("addi sp, sp, -56");
	#endif /* __riscv_32e */

	asm("sw   x1,   0(sp)");
	asm("sw   x4,   4(sp)");
	asm("sw   x5,   8(sp)");
	asm("sw   x6,  12(sp)");
	asm("sw   x7,  16(sp)");
	asm("sw   x10, 20(sp)");
	asm("sw   x11, 24(sp)");
	asm("sw   x12, 28(sp)");
	asm("sw   x13, 32(sp)");
	asm("sw   x14, 36(sp)");
	asm("sw   x15, 40(sp)");
	asm("csrr x10, mcause");
	asm("csrr x11, mepc");
	asm("csrr x12, mtval");
	asm("sw   x10, 44(sp)");
	asm("sw   x11, 48(sp)");
	asm("sw   x12, 52(sp)");
	#ifndef __riscv_32e
	asm("sw   x16, 56(sp)");
	asm("sw   x17, 60(sp)");
	asm("sw   x28, 64(sp)");
	asm("sw   x29, 68(sp)");
	asm("sw   x30, 72(sp)");
	asm("sw   x31, 76(sp)");
	#endif /* __riscv_32e */

	asm ("csrr a0, mcause");
	asm ("mv a1, sp");
	asm ("call core_exception_handler");

	asm("lw   x10, 44(sp)");
	asm("lw   x11, 48(sp)");
	asm("lw   x12, 52(sp)");
	asm("csrw mcause, x10");
	asm("csrw mepc  , x11");
	asm("csrw mtval , x12");

	asm("lw   x1,   0(sp)");
	asm("lw   x4,   4(sp)");
	asm("lw   x5,   8(sp)");
	asm("lw   x6,  12(sp)");
	asm("lw   x7,  16(sp)");
	asm("lw   x10, 20(sp)");
	asm("lw   x11, 24(sp)");
	asm("lw   x12, 28(sp)");
	asm("lw   x13, 32(sp)");
	asm("lw   x14, 36(sp)");
	asm("lw   x15, 40(sp)");
	#ifndef __riscv_32e
	asm("lw   x16, 56(sp)");
	asm("lw   x17, 60(sp)");
	asm("lw   x28, 64(sp)");
	asm("lw   x29, 68(sp)");
	asm("lw   x30, 72(sp)");
	asm("lw   x31, 76(sp)");
	#endif /* __riscv_32e */

	#ifndef __riscv_32e
	asm("addi sp, sp, 80");
	#else
	asm("addi sp, sp, 56");
	#endif /* __riscv_32e */
	asm("mret");

}
